Module spare parts ABB SB510 3BSE000860R1

Focus on DCS, PLC, robot control system and large servo system.

Main products: various modules / cards, controllers, touch screens, servo drivers.

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ABB SB510 3BSE000860R1

Each analog input model is internally triplicated with 3-2-0 capability. State 4 is the first dangerous undetected failure of an analog input microprocessor module, and state 5 is the first dangerous undetected failure of an analog input circuit to an input module. States 13 _ and 14 are the corresponding states after a second dangerous detected failure occurs. The transitions from the initial state to the intermediate states representing the initial failure of one of three input microprocessors or input circuits are given by: kl,4 = 3 na XDU-pa kl,5 = 3 na nicd XDUica The transitions from the first failed state to the intermediate state for a detected failure and its subsequent repair are given by: k4,13 = 2 (DDmp + DDipa + nic )DDica) k5, 14 = 2 (XDDmp + XDDipa + xDDic) k13,4 = P'Aot k14,5 =ot The transitions from the first dangerous failure to the system failing to function are given by: k4,20 = 2 (XDUmp + 'XDUipa + nia IDUim) k5, 20 2 (AyDUmp + XDUipa + xDUica) Where: k = Probability of transition from the ith to the jth state Iu. = Dangerous undetected failure rate of analog input microprocessor XDDipa Dangerous detected failure rate of analog input microprocessor XDUIpa Dangerous undetected failure rate of analog input circuit xDD ica Dangerous detected failure rate of analog input circuit MPR Associates, Inc. WMPR 320 King Street Alexandria, VA 22314 Calculation No. Pre red By hecked By Page 1 426-001-CBS-01 Z=:: ,j States 6, 7, 14, and 15- Digital Output Each digital output module has a triplicated output processor with a quad voter output circuit. State 6 is the first dangerous undetected failure of a digital output microprocessor module, and state 7 is the first dangerous undetected failure of a digital output circuit from an output module. States 14 and 15 are the corresponding states after a second dangerous detected failure occurs. The transitions from the initial state to the intermediate states representing the initial failure of one of three output microprocessors or output circuits are given by: kl,6 = 3 md XDUo kl,7 = 4 m d noc XDU oc The transitions from the first failed state to the intermediate state for a detected failure and its subsequent repair are given by: ('XDDmp IDD XDD k6,14 -- 2 (; p Am ?'vop A. + n°d ocDD°) k7,15 = 2 (XDDmp + XDDopd + xDD o) k14,6 -ot k 15,7 = .t The transitions from the first dangerous failure to the system failing to function are given by: l(6,20 = 2Q(.DUmp +ODUo + Xn°? DU) k7,2 = 2 (,xDUmp + xDU op +xDU o) Where: XDU = Dangerous undetected failure rate of digital output microprocessor XDD ll -= Dangerous detected failure rate of digital output microprocessor xDUv = Dangerous undetected failure rate of digital output circuit xDD o = Dangerous detected failure rate of digital output circuit *MPR MPR Associates, Inc. 320 King Street Alexandria, VA 22314 Calculation No. 426-001-CBS-01 States 8, 9, 17, and 1-4ig Output Per Reference 8, each analog output module is triplicated for 3-2-1-0 capability meaning the triplicated input from the main processor requires three faults before a failure condition is reached. Since the probability of failure for the module is third order (-A3), its effect on the mean time to failure can be neglected. The transitions are: kl,8 k = k8,17 k 9,18 k 8,20 = k9,20 k17,8 " k18,9 0 0 0 0 0 0 State 10- Main Processor There are triple redundant main processor