UCC21530QDWKRQ1 door driver TI original stock

characteristic

It has the following characteristics in accordance with AEC-Q100 standard:

Device temperature class 1

Device HBM ESD classification grade H2

Device CDM ESD classification level C6

Functional safety and quality management

Documents helpful for the design of functional safety system

General purpose: dual low side, dual high side or half bridge driver

Wide body SOIC-14 (DWK) package

The spacing between drive channels is 3.3mm

Switch parameters:

19ns typical propagation delay

10ns minimum pulse width

5ns maximum delay matching

6ns maximum pulse width distortion

Common mode transient immunity (CMTI) is greater than 100V/ns

Service life of isolation layer>40 years

4A peak pull current, 6A peak perfusion current output

TTL and CMOS compatible inputs

3V to 18V input VCCI range

Up to 25V VDD output drive power

8V and 12V VDD UVLO options

Programmable overlap and dead time

Suppress input pulses and noise transients shorter than 5ns

Operating temperature range: - 40 ° C to + 125 ° C

Safety related certification:

8000VPK isolation according to DIN V VDE V 0884-11:2017-01

5.7kVRMS isolation up to 1 minute in accordance with UL 1577

CSA certification according to IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 terminal equipment standards

CQC certification in accordance with GB4943.1-2011 standard

explain

UCC21530-Q1 is an isolated dual channel gate driver with 4A peak pull current and 6A peak sink current. The driver is designed to drive IGBT, Si MOSFET and SiC MOSFET up to 5MHz, with excellent propagation delay and pulse width distortion.


The input side is isolated from the two output drivers through 5.7kVRMS enhanced isolation layer, and its common mode transient immunity (CMTI) is at least 100V/ns. The internal functional isolation between the two secondary side drivers supports operating voltages up to 1850V.


The driver can be configured as two low side drivers, two high side drivers or a half bridge driver with programmable dead time (DT). When the EN pin is pulled to the low level, the two outputs will be closed at the same time. When it is suspended or pulled high, the device can resume normal operation. As a fail safe mechanism, the primary side logic fault will force the two outputs to low level.

This device accepts VDD supply voltage up to 25V. The wide input voltage VCCI range of 3V to 18V makes the driver suitable for connecting digital and analog controllers. All supply voltage pins have undervoltage lockout (UVLO) protection.