MCF5272VM66 Microcontroller Chips New and Original

MCF5272VM66 MCF5272 - This document provides an overview of the MCF5272 microprocessor features

Features
A block diagram of the MCF5272 is shown in Figure 1. The main features are as follows:
? Static Version 2 ColdFire variable-length RISC processor
— 32-bit address and data path on-chip
— 66-MHz processor core and bus frequency
— Sixteen general-purpose 32-bit data and address registers
— Multiply-accumulate unit (MAC) for DSP and fast multiply operations
— 63 Dhrystone 2.1 MIPS at 66 MHz
? On-chip memories
— 4-Kbyte SRAM on CPU internal bus
— 16-Kbyte ROM on CPU internal bus
— 1-Kbyte instruction cache
? Power management
— Fully-static operation with processor sleep and whole-chip stop modes 
— Very rapid response to interrupts from the low-power sleep mode (wake-up 
feature)
— Clock enable/disable for each peripheral when not used
— Software-controlled disable of external clock input for virtually zero power 
consumption (low-power stop mode)
? Two universal asynchronous/synchronous receiver transmitters (UARTs)
— Full-duplex operation
— Based on MC68681 dual-UART (DUART) programming model
— Flexible baud rate generator
— Modem control signals available (CTS and RTS)
— Processor interrupt and wake-up capability
— Enhanced Tx, Rx FIFOs, 24 bytes each

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